Georgia Tech inventors have designed a compliant interconnect technology called “FlexConnects” that attempts to address these two areas of concern. To fabricate FlexConnects, sequential lithography and electroplating processes with two masking steps are used. Such an approach potentially reduces the cost of fabricating compliant interconnects. The viability of this fabrication process has been demonstrated by fabricating interconnects at a 100μm pitch. Through numerical simulations it is shown that the electrical performance of FlexConnects (self-inductance of ~37pH) is considerably enhanced without compromising their mechanical performance.
- Enhanced electrical performance
- Ability to function without compromising mechanical performance
- Electronic packaging
Compliant free-standing structures can be used as chip-to-substrate interconnects. Such “compliant interconnects” are a potential solution to the requirements that will be imposed on chip-to-substrate interconnects over the next decade. However, cost of implementation and electrical performance limit compliant interconnects.