Zhong Lin Wang, Wenzhuo Wu, and Xiaonan Wen from the School of Materials Science and Engineering at Georgia Tech have developed an active pixel-addressable pressure sensor matrix based on a 3D array of vertical nanowire piezotronic transistors. Ideal for tactile imaging, this innovation can detect small pressure changes—less than 10 kPa—thanks to its 15- to 25-fold increase in pixel density compared to other technology.
This large-scale integration of a strain-gated vertical piezotronic transistor (SGVPT) array is achieved by combining patterned in-place growth of vertically aligned zinc oxide (ZnO) nanowires with state-of-the-art microfabrication techniques. The ZnO nanowires serve as the active channel material to help reduce the stochastic pixel-to-pixel variation, ensuring uniform device performance. Monitoring the output current of the matrix’s individual SGVPTs and multiplexed-addressing all of the pixels enables easy imaging of the spatial profile of the applied pressure.
Researchers took advantage of the piezotronic effect to replace the three-terminal configuration with a two-terminal configuration, significantly simplifying layout design and circuitry fabrication while maintaining effective control over individual devices. They also replaced the externally applied voltage with inner-crystal generated piezopotential, enabling fabrication of high-density arrays of SGVPTs.
- High spatial resolution: Offers 92x92 pixels in 1 cm2 (i.e., 234 pixels per inch [PPI]), with pixels sized 20x20 mm2 and a 100-mm pitch size
- High tactile sensitivity: Achieves 2.1 m2•kPa–1 pressure sensing
- Highly aligned/uniform: Ensures the integration of large-scale nanowire electronics for complex functional systems for industrial scale-up and practical applications
- Transparent and flexible: Ideal for active/adaptive tactile imaging
- Artificial skin
- Personal electronics
- Smart biomedical treatments
- Self-powered flexible functional systems
This landmark breakthrough in three-dimensional (3D) piezotronic transistor arrays dramatically advances the field of human-electronics interfacing, sensing, and micro-/nanosystems. The field of nanowire piezotronic transistors has been pursued as a solution to the challenges associated with directly interfacing electronics with mechanical actions (i.e., strain) and the intense levels of device density and spatial resolution required to mimic tactile sensing capabilities. Although wrap-gate configuration enables better vertical structuring of functional nanodevices than 3D integrated circuits, it is a cumbersome fabrication method. Georgia Tech’s alternative approach for 3D structuring—the first and by far the largest 3D array of piezotronic transistors circuitry—eliminates the gate electrode, paving the way for industrial-scale integration of nanowire devices for the emerging field of flexible electronics.